Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/232996
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dc.coverage.spatialInformation and Communication Engineering
dc.date.accessioned2019-03-20T04:49:33Z-
dc.date.available2019-03-20T04:49:33Z-
dc.identifier.urihttp://hdl.handle.net/10603/232996-
dc.description.abstractAbstract available
dc.format.extentxxxi, 147p.
dc.languageOthers
dc.relation137-145
dc.rightsuniversity
dc.titleDesign analysis and development of a class of microstripline interconnect structures for parallel high speed dram interfaces
dc.title.alternative
dc.creator.researcherP, Rajeswari
dc.subject.keywordDramInterfaces
dc.subject.keywordElectroniccircuit
dc.subject.keywordMemoryModule
dc.subject.keywordMicrostripline
dc.subject.keywordSignalLines
dc.description.noteData not available
dc.contributor.guideRaju, S
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.date.registeredn.d.
dc.date.completed2017
dc.date.awardedn.d.
dc.format.dimensions30cm.
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Faculty of Information and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title page.pdfAttached File24.89 kBAdobe PDFView/Open
02_certificate.pdf254.62 kBAdobe PDFView/Open
03_abstract.pdf5.4 kBAdobe PDFView/Open
04_acknowledgement.pdf24.26 kBAdobe PDFView/Open
05_table of content.pdf22.2 kBAdobe PDFView/Open
06_list of table.pdf110.01 kBAdobe PDFView/Open
07_list of figures.pdf148.02 kBAdobe PDFView/Open
08_list of symbol and abbreviations.pdf134.3 kBAdobe PDFView/Open
09_chapter 1.pdf338.98 kBAdobe PDFView/Open
10_chapter 2.pdf1.15 MBAdobe PDFView/Open
11_chapter 3.pdf1.24 MBAdobe PDFView/Open
12_chapter 4.pdf1.71 MBAdobe PDFView/Open
13_chapter 5.pdf9.97 MBAdobe PDFView/Open
14_chapter 6.pdf20.75 kBAdobe PDFView/Open
15_references.pdf574.9 kBAdobe PDFView/Open


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