Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/232961
Title: Investigation on CMOS VLSI implementation of multiplication process for RLNS based system and its application in digital image processing
Researcher: V, Shalini R
Guide(s): Sampath, P
Keywords: Binary
DigitalImage
HighSpeed
Logarithmic
Multiplication
University: Anna University
Completed Date: 2017
Abstract: Abstract available
Pagination: xxi, 169p.
URI: http://hdl.handle.net/10603/232961
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File10.65 kBAdobe PDFView/Open
02_certificate.pdf356 kBAdobe PDFView/Open
03_abstract.pdf87.16 kBAdobe PDFView/Open
04_acknowledgement.pdf6.56 kBAdobe PDFView/Open
05_table of content.pdf100.9 kBAdobe PDFView/Open
06_list of table.pdf92.89 kBAdobe PDFView/Open
07_list of figures.pdf260.62 kBAdobe PDFView/Open
08_list of abbreviation.pdf4.59 kBAdobe PDFView/Open
09_chapter 1.pdf316.28 kBAdobe PDFView/Open
10_chapter 2.pdf1.07 MBAdobe PDFView/Open
11_chapter 3.pdf852.12 kBAdobe PDFView/Open
12_chapter 4.pdf1.08 MBAdobe PDFView/Open
13_chapter 5.pdf802.65 kBAdobe PDFView/Open
14_chapter 6.pdf193.23 kBAdobe PDFView/Open
15_references.pdf706.02 kBAdobe PDFView/Open
16_list of publication.pdf87.2 kBAdobe PDFView/Open
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