1. Shodhganga@INFLIBNET
  2. Vivekananda Global University
  3. Department of Electronics and Communication
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/225969
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2019-01-09T05:21:01Z-
dc.date.available2019-01-09T05:21:01Z-
dc.identifier.urihttp://hdl.handle.net/10603/225969-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsself
dc.titleLow Power Test Architecture for Fault Detection in SRAMs
dc.title.alternative
dc.creator.researcherVikram Singh Takher
dc.subject.keywordEngineering and Technology,Engineering,Engineering Electrical and Electronic
dc.description.note
dc.contributor.guideRahul Raj Choudhary and Sushila
dc.publisher.placeJaipur
dc.publisher.universityVivekananda Global University
dc.publisher.institutionDepartment of Electronics and Communication
dc.date.registered12/4/2014
dc.date.completed2019
dc.date.awarded5-1-2019
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics and Communication

Files in This Item:
File Description SizeFormat 
certificate.pdfAttached File423.44 kBAdobe PDFView/Open
chapter 1.pdf223.69 kBAdobe PDFView/Open
chapter 2.pdf332.89 kBAdobe PDFView/Open
chapter 3.pdf363.49 kBAdobe PDFView/Open
chapter 4.pdf336.02 kBAdobe PDFView/Open
chapter 5.pdf380.15 kBAdobe PDFView/Open
chapter 6.pdf103.24 kBAdobe PDFView/Open
preliminary pages.pdf1.72 MBAdobe PDFView/Open
publication.pdf203.57 kBAdobe PDFView/Open
references.pdf148.08 kBAdobe PDFView/Open
title.pdf250.15 kBAdobe PDFView/Open
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