1. Shodhganga@INFLIBNET
  2. Sri Venkateswara University
  3. Department of Electronics & Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/224097
Title: Design of digital circuits for efficient FPGA implementation
Researcher: S V Padmaja Rani
Guide(s): Muralidhar M
University: Sri Venkateswara University
Completed Date: n.d.
Abstract: none
URI: http://hdl.handle.net/10603/224097
Appears in Departments:Department of Electronics & Communication Engineering

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01_title.pdfAttached File106.26 kBAdobe PDFView/Open
02_certificate.pdf364.38 kBAdobe PDFView/Open
03_declaration.pdf212.69 kBAdobe PDFView/Open
04_acknowledgement.pdf225.8 kBAdobe PDFView/Open
05_contents.pdf387.09 kBAdobe PDFView/Open
06_abstract.pdf149.56 kBAdobe PDFView/Open
07_chapter_01.pdf273.36 kBAdobe PDFView/Open
08_chapter_02.pdf1.4 MBAdobe PDFView/Open
09_chapter_03.pdf1.59 MBAdobe PDFView/Open
10_chapter_04.pdf1.49 MBAdobe PDFView/Open
11_chapter_05.pdf1.1 MBAdobe PDFView/Open
12_chapter_06.pdf1.02 MBAdobe PDFView/Open
13_chapter_07.pdf27.82 kBAdobe PDFView/Open
14_publications.pdf346.39 kBAdobe PDFView/Open
15_references.pdf287.99 kBAdobe PDFView/Open
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