Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/22180
Title: | Studies on jitter response and design dependent dynamics of some Pll based clock or data recovery circuits |
Researcher: | Ghosh, Madhusudan |
Guide(s): | Sarkar, Bishnu Charan |
Keywords: | Physics |
Upload Date: | 5-Aug-2014 |
University: | The University of Burdwan |
Completed Date: | n.d. |
Abstract: | None |
Pagination: | - |
URI: | http://hdl.handle.net/10603/22180 |
Appears in Departments: | Department of Physics |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
dissertation submitted by madhusudan ghosh.pdf | Attached File | 2.75 MB | Adobe PDF | View/Open |
synopsis submitted by madhusudan ghosh.pdf | 108.77 kB | Adobe PDF | View/Open |
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