1. Shodhganga@INFLIBNET
  2. Swami Ramanand Teerth Marathwada University
  3. Department of Instrumentation Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/216330
Title: Performance checking of superscalar architectures and suggesting an optomum design
Researcher: Apte, Sulabha Suhas
Guide(s): Deshpande, C B
Keywords: Cachesimulators
Memoryhierarchy
RUUs
University: Swami Ramanand Teerth Marathwada University
Completed Date: 2005
Abstract: Abstract available
Pagination: xix, 312p.
URI: http://hdl.handle.net/10603/216330
Appears in Departments:Department of Instrumentation Engineering

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01_title.pdfAttached File17.5 kBAdobe PDFView/Open
02_table of content.pdf8.49 kBAdobe PDFView/Open
03_index.pdf120.4 kBAdobe PDFView/Open
04_certificate.pdf16.48 kBAdobe PDFView/Open
05_list of tables figures and charts.pdf169.9 kBAdobe PDFView/Open
06_acknowledgement.pdf42.43 kBAdobe PDFView/Open
07_declaration.pdf14.67 kBAdobe PDFView/Open
08_abstract.pdf77.73 kBAdobe PDFView/Open
09_chapter 1.pdf285.34 kBAdobe PDFView/Open
10_chapter 2.pdf116.76 kBAdobe PDFView/Open
11_chapter 3.pdf928.37 kBAdobe PDFView/Open
12_chapter 4.pdf681.57 kBAdobe PDFView/Open
13_chapter 5.pdf476.42 kBAdobe PDFView/Open
14_chapter 6.pdf3.31 MBAdobe PDFView/Open
15_chapter 7.pdf4.34 MBAdobe PDFView/Open
16_chapter 8.pdf2.61 MBAdobe PDFView/Open
17_chapter 9.pdf2.54 MBAdobe PDFView/Open
18_chapter 10.pdf3.55 MBAdobe PDFView/Open
19_chapter 11.pdf103.6 kBAdobe PDFView/Open
20_appendix 1.pdf642.84 kBAdobe PDFView/Open
21_appendix 2.pdf71.06 kBAdobe PDFView/Open
22_references.pdf268.1 kBAdobe PDFView/Open
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