Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/215501
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2018-09-18T06:12:32Z-
dc.date.available2018-09-18T06:12:32Z-
dc.identifier.urihttp://hdl.handle.net/10603/215501-
dc.description.abstractnewline
dc.format.extent1-13, 1-76
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleEFFICIENT AND COMPATIBLE VLSI ARCHITECTURES OF PARALLEL MAC BASED ON HIGH RADIX MODIFIED BOOTH ALGORITHM
dc.title.alternative
dc.creator.researcherPratibhadevi Tapashetti
dc.description.note
dc.contributor.guideParveen Kumar
dc.publisher.placeJaipur
dc.publisher.universityNims University Rajasthan
dc.publisher.institutionDepartment of Electronics and Communication Engineering
dc.date.registered16.01.2009
dc.date.completed2018
dc.date.awarded12.05.2018
dc.format.dimensions
dc.format.accompanyingmaterialCD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01 title.pdfAttached File57.85 kBAdobe PDFView/Open
02 acknolwledgemenet.pdf747.89 kBAdobe PDFView/Open
03 declaration.pdf689.67 kBAdobe PDFView/Open
04 certificate.pdf752.47 kBAdobe PDFView/Open
05 contents.pdf16.34 kBAdobe PDFView/Open
06 figures.pdf70.9 kBAdobe PDFView/Open
07 tables.pdf4.09 kBAdobe PDFView/Open
08 symbols and abbreviation.pdf3.77 kBAdobe PDFView/Open
09 appendix-i.pdf69.99 kBAdobe PDFView/Open
10 abstract.pdf71.6 kBAdobe PDFView/Open
11 chapter 1.pdf277.56 kBAdobe PDFView/Open
12 chapter 2.pdf295.17 kBAdobe PDFView/Open
13 chapter 3.pdf523.11 kBAdobe PDFView/Open
14 chapter 4.pdf170.45 kBAdobe PDFView/Open
15 chapter 5.pdf76.75 kBAdobe PDFView/Open
16 chapter 6.pdf69.94 kBAdobe PDFView/Open
17 bibliography.pdf76.85 kBAdobe PDFView/Open
18 paper 1.pdf325.34 kBAdobe PDFView/Open
19 paper certificate 1.pdf162.87 kBAdobe PDFView/Open
20 paper 2.pdf295.32 kBAdobe PDFView/Open
21 certificate 2.pdf151.27 kBAdobe PDFView/Open


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