1. Shodhganga@INFLIBNET
  2. Veer Surendra Sai University of Technology
  3. Department of Electronics and Telecommunication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/208894
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dc.coverage.spatial
dc.date.accessioned2018-07-20T08:35:32Z-
dc.date.available2018-07-20T08:35:32Z-
dc.identifier.urihttp://hdl.handle.net/10603/208894-
dc.description.abstractA digital subsystem consists of several functional units demanding high-performance design parameters in terms of speed, power and area. These functional units are built up of computational modules executing various arithmetic operations.At present, we have countless Digital Signal Processing (DSP) applications like image processing, video processing, adaptive filters and cryptography employing these computational modules. Therefore, continual efforts are being processed to enhance the design parameters of the computational blocks, aiming the same for the overall system. The backbone of the computational architecture is truly reliant on its computational algorithms and the choice of number systems. newline
dc.format.extent158 p.
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleA Study on Some Unconventional Computation For High Performance VLSI Systems
dc.title.alternative
dc.creator.researcherBarik Ranjan Kumar
dc.subject.keywordLogic Design; Computer Arithmetic; Redundant Binary; Digital Circuits; Vedic Mathematics; High-Performance Computing; VLSI Implementation. Logic Design; Computer Arithmetic; Redundant Binary; Digital Circuits; Vedic Mathematics; High-Performance Computing; VLSI Implementation.
dc.description.noteLogic Design; Computer Arithmetic; Redundant Binary; Digital Circuits; Vedic Mathematics; High-Performance Computing; VLSI Implementation
dc.contributor.guidePradhan Manoranjan
dc.publisher.placeSambalpur
dc.publisher.universityVeer Surendra Sai University of Technology
dc.publisher.institutionDepartment of Electronics and Telecommunication Engineering
dc.date.registered14-9-2015
dc.date.completed09-07-2018
dc.date.awarded
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics and Telecommunication Engineering

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01_title_page.pdfAttached File276.28 kBAdobe PDFView/Open
03_certificate.pdf121.1 kBAdobe PDFView/Open
06_abstract.pdf497.66 kBAdobe PDFView/Open
08_list of figures.pdf674.18 kBAdobe PDFView/Open
09_list of tables.pdf439.29 kBAdobe PDFView/Open
10_contents.pdf514.74 kBAdobe PDFView/Open
11_chapter1.pdf1.97 MBAdobe PDFView/Open
12_chapter_2.pdf6.31 MBAdobe PDFView/Open
13_chapter3.pdf5.8 MBAdobe PDFView/Open
14__chapter 4.pdf1.87 MBAdobe PDFView/Open
15_chapter_5.pdf2.53 MBAdobe PDFView/Open
16_chapter_6.pdf535.59 kBAdobe PDFView/Open
18_appendix.pdf1.05 MBAdobe PDFView/Open
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