1. Shodhganga@INFLIBNET
  2. Vellore Institute of Technology, Vellore
  3. School of Electronic Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/207997
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2018-07-13T07:30:33Z-
dc.date.available2018-07-13T07:30:33Z-
dc.identifier.urihttp://hdl.handle.net/10603/207997-
dc.description.abstractnewline
dc.format.extentI-VI, 1-99
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleLow Power High Performance Content Addressable Memory Architectures
dc.title.alternative
dc.creator.researcherMohammed Zackriya .V
dc.subject.keywordCam Architecture
dc.subject.keywordContent Addressable Memory Architectures
dc.subject.keywordContent Addressable Memory (CAM)
dc.description.note
dc.contributor.guideHarish M Kittur
dc.publisher.placeVellore
dc.publisher.universityVIT University
dc.publisher.institutionSchool of Electronic Engineering
dc.date.registered01/07/2014
dc.date.completed2017
dc.date.awarded17/07/2017
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:School of Electronic Engineering

Files in This Item:
File Description SizeFormat 
01_title .pdfAttached File137.87 kBAdobe PDFView/Open
02_certificates, abstract.pdf218.3 kBAdobe PDFView/Open
03_preliminary pages.pdf275.99 kBAdobe PDFView/Open
04_chapter 1.pdf158.08 kBAdobe PDFView/Open
05_chapter 2.pdf450.83 kBAdobe PDFView/Open
06_chapter 3.pdf1.37 MBAdobe PDFView/Open
07_chapter 4.pdf393.85 kBAdobe PDFView/Open
08_chapter 5.pdf473.85 kBAdobe PDFView/Open
09_chapter 6.pdf493.32 kBAdobe PDFView/Open
10_chapter 7.pdf485.52 kBAdobe PDFView/Open
11_chapter 8.pdf55.78 kBAdobe PDFView/Open
12_references , list of publications.pdf266.2 kBAdobe PDFView/Open
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