Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/207997
Title: Low Power High Performance Content Addressable Memory Architectures
Researcher: Mohammed Zackriya .V
Guide(s): Harish M Kittur
Keywords: Cam Architecture
Content Addressable Memory Architectures
Content Addressable Memory (CAM)
University: VIT University
Completed Date: 2017
Abstract: newline
Pagination: I-VI, 1-99
URI: http://hdl.handle.net/10603/207997
Appears in Departments:School of Electronic Engineering

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01_title .pdfAttached File137.87 kBAdobe PDFView/Open
02_certificates, abstract.pdf218.3 kBAdobe PDFView/Open
03_preliminary pages.pdf275.99 kBAdobe PDFView/Open
04_chapter 1.pdf158.08 kBAdobe PDFView/Open
05_chapter 2.pdf450.83 kBAdobe PDFView/Open
06_chapter 3.pdf1.37 MBAdobe PDFView/Open
07_chapter 4.pdf393.85 kBAdobe PDFView/Open
08_chapter 5.pdf473.85 kBAdobe PDFView/Open
09_chapter 6.pdf493.32 kBAdobe PDFView/Open
10_chapter 7.pdf485.52 kBAdobe PDFView/Open
11_chapter 8.pdf55.78 kBAdobe PDFView/Open
12_references , list of publications.pdf266.2 kBAdobe PDFView/Open
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