Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/207858
Title: Ultra low power digital VLSI Design Design Implementation and Analysis of Low Power High Speed SRAM
Researcher: NIDHI TIWARI
Guide(s): YOGESH CHANDRA SHARMA, K J RANGRA, VAIBHAV NEEMA
University: Vivekananda Global University
Completed Date: 2018
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/207858
Appears in Departments:Department of Electronics and Communication

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5.new references.pdfAttached File67.33 kBAdobe PDFView/Open
6.appendix.pdf232.45 kBAdobe PDFView/Open
7.my publications.pdf4.89 MBAdobe PDFView/Open
certificate.pdf560.83 kBAdobe PDFView/Open
chapter 1.pdf304.43 kBAdobe PDFView/Open
chapter 2.pdf415.24 kBAdobe PDFView/Open
chapter 3.pdf528.04 kBAdobe PDFView/Open
chapter 4.pdf1.12 MBAdobe PDFView/Open
chapter 5.pdf749.93 kBAdobe PDFView/Open
chapter 6.pdf279.74 kBAdobe PDFView/Open
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