Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/207858
Title: | Ultra low power digital VLSI Design Design Implementation and Analysis of Low Power High Speed SRAM |
Researcher: | NIDHI TIWARI |
Guide(s): | YOGESH CHANDRA SHARMA, K J RANGRA, VAIBHAV NEEMA |
University: | Vivekananda Global University |
Completed Date: | 2018 |
Abstract: | newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/207858 |
Appears in Departments: | Department of Electronics and Communication |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
5.new references.pdf | Attached File | 67.33 kB | Adobe PDF | View/Open |
6.appendix.pdf | 232.45 kB | Adobe PDF | View/Open | |
7.my publications.pdf | 4.89 MB | Adobe PDF | View/Open | |
certificate.pdf | 560.83 kB | Adobe PDF | View/Open | |
chapter 1.pdf | 304.43 kB | Adobe PDF | View/Open | |
chapter 2.pdf | 415.24 kB | Adobe PDF | View/Open | |
chapter 3.pdf | 528.04 kB | Adobe PDF | View/Open | |
chapter 4.pdf | 1.12 MB | Adobe PDF | View/Open | |
chapter 5.pdf | 749.93 kB | Adobe PDF | View/Open | |
chapter 6.pdf | 279.74 kB | Adobe PDF | View/Open |
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