Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/204017
Title: | Optimized complex multiplier and modified bit parallel multiplier based radix 2 and radix 4 pipelined fft architecture |
Researcher: | Rao, Hanumantha K |
Guide(s): | Paul, Charlie Kumar C |
Keywords: | Algorithms Digital signal processing |
University: | St. Peters University |
Completed Date: | 2016 |
Abstract: | None |
Pagination: | 154 p. |
URI: | http://hdl.handle.net/10603/204017 |
Appears in Departments: | Department of Electronics and Communication |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 227.17 kB | Adobe PDF | View/Open |
02_certificate.pdf | 196.12 kB | Adobe PDF | View/Open | |
03_declaration.pdf | 135.55 kB | Adobe PDF | View/Open | |
04_acknowledgements.pdf | 144.52 kB | Adobe PDF | View/Open | |
05_abstract.pdf | 89.75 kB | Adobe PDF | View/Open | |
06_content.pdf | 94.59 kB | Adobe PDF | View/Open | |
07_list of tables and figures.pdf | 177.22 kB | Adobe PDF | View/Open | |
08_abbreviations.pdf | 91.39 kB | Adobe PDF | View/Open | |
09_chapter 1.pdf | 611.24 kB | Adobe PDF | View/Open | |
10_chapter 2.pdf | 319.66 kB | Adobe PDF | View/Open | |
11_chapter 3.pdf | 2.18 MB | Adobe PDF | View/Open | |
12_chapter 4.pdf | 7.37 MB | Adobe PDF | View/Open | |
13_chapter 5.pdf | 1.23 MB | Adobe PDF | View/Open | |
14_chapter 6.pdf | 291.02 kB | Adobe PDF | View/Open | |
15_chapter 7.pdf | 90.29 kB | Adobe PDF | View/Open | |
16_references.pdf | 326 kB | Adobe PDF | View/Open |
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