Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/201352
Title: Investigations of techniques for clock distribution networks used in high speed FFT architectures
Researcher: A, Sridevi
Guide(s): Prabha, V Lakshmi
Keywords: Architecture
Buffered
Metrics
Topologies
Utilization
University: Anna University
Completed Date: 2016
Abstract: Abstract available
Pagination: xxvi, 191p.
URI: http://hdl.handle.net/10603/201352
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File45.83 kBAdobe PDFView/Open
02_certificate.pdf511.57 kBAdobe PDFView/Open
03_abstract.pdf125.61 kBAdobe PDFView/Open
04_acknowledgement.pdf136.42 kBAdobe PDFView/Open
05_table of content.pdf141.01 kBAdobe PDFView/Open
06_list of table.pdf957.34 kBAdobe PDFView/Open
07_list of figures.pdf184.48 kBAdobe PDFView/Open
08_list of symbols and abbreviations.pdf997.31 kBAdobe PDFView/Open
09_chapter 1.pdf389.01 kBAdobe PDFView/Open
10_chapter 2.pdf463.21 kBAdobe PDFView/Open
11_chapter 3.pdf1.57 MBAdobe PDFView/Open
12_chapter 4.pdf1.57 MBAdobe PDFView/Open
13_chapter 5.pdf1.55 MBAdobe PDFView/Open
14_chapter 6.pdf936.32 kBAdobe PDFView/Open
15_references.pdf974.58 kBAdobe PDFView/Open
16_list of publication.pdf140.26 kBAdobe PDFView/Open
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