1. Shodhganga@INFLIBNET
  2. Banasthali Vidyapith
  3. Department of Computer Science
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/197536
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2018-03-21T11:57:02Z-
dc.date.available2018-03-21T11:57:02Z-
dc.identifier.urihttp://hdl.handle.net/10603/197536-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleEfficient Routing by Minimizing End To End Delay in Delay Tolerant Enabled VANETs
dc.title.alternative
dc.creator.researcherSingh, Vijander
dc.description.note
dc.contributor.guideDadhich, Reena
dc.publisher.placeBanasthali
dc.publisher.universityBanasthali Vidyapith
dc.publisher.institutionDepartment of Computer Science
dc.date.registeredn. d.
dc.date.completed2015
dc.date.awarded
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Computer Science

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File34.02 kBAdobe PDFView/Open
02_certificates.pdf75.77 kBAdobe PDFView/Open
03_preliminary pages.pdf128.6 kBAdobe PDFView/Open
04_chapter 1.pdf561.12 kBAdobe PDFView/Open
05_chapter 2.pdf1.05 MBAdobe PDFView/Open
06_chapter 3.pdf635.86 kBAdobe PDFView/Open
07_chapter 4.pdf779.35 kBAdobe PDFView/Open
08_chapter 5.pdf566.9 kBAdobe PDFView/Open
09_chapter 6.pdf816.68 kBAdobe PDFView/Open
10_chapter 7.pdf686.91 kBAdobe PDFView/Open
11_chapter 8.pdf322.21 kBAdobe PDFView/Open
12_appendices.pdf5.93 MBAdobe PDFView/Open
13_publications.pdf303.09 kBAdobe PDFView/Open
14_references.pdf383.22 kBAdobe PDFView/Open
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