Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/196829
Title: Realization of reduced computation and power efficient DCT architecture for image compression
Researcher: K, Senthilkumar K
Guide(s): Seshasayanan, R
Keywords: Adjacent
Architecture
Dynamic
Implementation
Reconfigurable
University: Anna University
Completed Date: 2016
Abstract: Abstract available
Pagination: xxiii, 130p.
URI: http://hdl.handle.net/10603/196829
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File22.06 kBAdobe PDFView/Open
02_certificate.pdf152.85 kBAdobe PDFView/Open
03_abstract.pdf12.81 kBAdobe PDFView/Open
04_acknowledgement.pdf5.24 kBAdobe PDFView/Open
05_table of content.pdf18.65 kBAdobe PDFView/Open
06_list of table.pdf7.39 kBAdobe PDFView/Open
07_list of figures.pdf17.93 kBAdobe PDFView/Open
08_list of symbols and abbreviations.pdf11.28 kBAdobe PDFView/Open
09_chapter 1.pdf62.57 kBAdobe PDFView/Open
10_chapter 2.pdf290.85 kBAdobe PDFView/Open
11_chapter 3.pdf2.01 MBAdobe PDFView/Open
12_chapter 4.pdf702.31 kBAdobe PDFView/Open
13_chapter 5.pdf194.87 kBAdobe PDFView/Open
14_chapter 6.pdf57.23 kBAdobe PDFView/Open
15_references.pdf91.59 kBAdobe PDFView/Open
16_list of publication.pdf9.35 kBAdobe PDFView/Open
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