Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/196219
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DC FieldValueLanguage
dc.coverage.spatialElectrical and Electronics Engineering-
dc.date.accessioned2018-03-15T12:15:29Z-
dc.date.available2018-03-15T12:15:29Z-
dc.identifier.urihttp://hdl.handle.net/10603/196219-
dc.description.abstractAbstract available-
dc.format.extentxxiv, 159p.-
dc.languageEnglish-
dc.relation144-158-
dc.rightsuniversity-
dc.titleInvestigations on performance of multilevel inverter topologies for medium power applications-
dc.creator.researcherA, Rathinam-
dc.subject.keywordCascaded-
dc.subject.keywordCircuit-
dc.subject.keywordDiode-
dc.subject.keywordHybrid-
dc.subject.keywordSynchronous-
dc.description.noteData not available-
dc.contributor.guideKarthikeyan, T-
dc.publisher.placeChennai-
dc.publisher.universityAnna University-
dc.publisher.institutionFaculty of Electrical and Electronics Engineering-
dc.date.registeredn.d.-
dc.date.completed2016-
dc.date.awardedn.d.-
dc.format.dimensions8cm.-
dc.format.accompanyingmaterialNone-
dc.source.universityUniversity-
dc.type.degreePh.D.-
Appears in Departments:Faculty of Electrical and Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_title page.pdfAttached File25.04 kBAdobe PDFView/Open
02_certificate.pdf662.05 kBAdobe PDFView/Open
03_abstract.pdf241.38 kBAdobe PDFView/Open
04_acknowledgement.pdf152.95 kBAdobe PDFView/Open
05_table of content.pdf321.01 kBAdobe PDFView/Open
06_list of table.pdf160.96 kBAdobe PDFView/Open
07_list of figures.pdf630.02 kBAdobe PDFView/Open
08_list of symbol and abbreviations.pdf416.2 kBAdobe PDFView/Open
09_chapter 1.pdf5.07 MBAdobe PDFView/Open
10_chapter 2.pdf2.7 MBAdobe PDFView/Open
11_chapter 3.pdf5.11 MBAdobe PDFView/Open
12_chapter 4.pdf2.56 MBAdobe PDFView/Open
13_chapter 5.pdf1.92 MBAdobe PDFView/Open
14_chapter 6.pdf342.99 kBAdobe PDFView/Open
15_references.pdf2.48 MBAdobe PDFView/Open
16_list of publication.pdf165.71 kBAdobe PDFView/Open


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