1. Shodhganga@INFLIBNET
  2. Jawaharlal Nehru Technological University, Hyderabad
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/191767
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DC FieldValueLanguage
dc.date.accessioned2018-02-16T04:54:23Z-
dc.date.available2018-02-16T04:54:23Z-
dc.identifier.urihttp://hdl.handle.net/10603/191767-
dc.description.abstractnewline-
dc.languageEnglish-
dc.rightsuniversity-
dc.titleDesign of built in self test and repair scheme for static random access memory-
dc.creator.researcherAsha rani M-
dc.contributor.guideJinaga B C-
dc.publisher.placeKukatpally-
dc.publisher.universityJawaharlal Nehru Technological University, Hyderabad-
dc.publisher.institutionDepartment of Electronics and Communication Engineering-
dc.date.registered17/11/2007-
dc.date.completed2007-
dc.format.accompanyingmaterialDVD-
dc.source.universityUniversity-
dc.type.degreePh.D.-
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File32.87 kBAdobe PDFView/Open
02_certificate.pdf23.31 kBAdobe PDFView/Open
03_acknowledgement.pdf35.13 kBAdobe PDFView/Open
04_abstract.pdf38.58 kBAdobe PDFView/Open
05_contents.pdf229.78 kBAdobe PDFView/Open
06_chapter_01.pdf401.51 kBAdobe PDFView/Open
07_chapter_02.pdf496.82 kBAdobe PDFView/Open
08_chapter_03.pdf466.6 kBAdobe PDFView/Open
09_chapter_04.pdf569.26 kBAdobe PDFView/Open
10_chapter_05.pdf666.1 kBAdobe PDFView/Open
11_chapter_06.pdf662.85 kBAdobe PDFView/Open
12_chapter_07.pdf883.74 kBAdobe PDFView/Open
13_chapter_08.pdf324.4 kBAdobe PDFView/Open
14_appendix.pdf148.27 kBAdobe PDFView/Open
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