Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/191392
Title: Steganography System on Reconfigurable Hardware and Its Design Verification
Researcher: Sundararaman, R
Guide(s): Hari Narayan Upadhyay
Keywords: Image Encryption FPGA based image Encry ption
Image steganography FPGA
University: SASTRA University
Completed Date: 02/09/2015
Abstract: Abstract included newline
Pagination: xxix,251p
URI: http://hdl.handle.net/10603/191392
Appears in Departments:School of Electrical and Electronics Engineering

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01_title page.pdfAttached File186.9 kBAdobe PDFView/Open
02_dedications.pdf312.25 kBAdobe PDFView/Open
03_acknowledgement.pdf446.53 kBAdobe PDFView/Open
04_certificate.pdf382.61 kBAdobe PDFView/Open
05_declaration.pdf263.18 kBAdobe PDFView/Open
06_table of contents.pdf599.24 kBAdobe PDFView/Open
07_list of tables .pdf463.81 kBAdobe PDFView/Open
08_list of figures.pdf540.9 kBAdobe PDFView/Open
09_abstract.pdf457.39 kBAdobe PDFView/Open
10_chapter_01.pdf1.12 MBAdobe PDFView/Open
11_chapter_02.pdf855.52 kBAdobe PDFView/Open
12_chapter_03.pdf2.96 MBAdobe PDFView/Open
13_chapter_04.pdf2.42 MBAdobe PDFView/Open
14_chapter_05.pdf5.59 MBAdobe PDFView/Open
15_chapter _06.pdf1.37 MBAdobe PDFView/Open
16_chapter_07.pdf474.52 kBAdobe PDFView/Open
17_appendix a.pdf6.1 MBAdobe PDFView/Open
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