1. Shodhganga@INFLIBNET
  2. Manonmaniam Sundaranar University
  3. Department of Mathematics
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/186468
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2018-01-08T06:18:47Z-
dc.date.available2018-01-08T06:18:47Z-
dc.identifier.urihttp://hdl.handle.net/10603/186468-
dc.description.abstractThe implementation of logic circuit using basic gates newline
dc.format.extentxv, 97
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleStructure of boolean function using gates and k map
dc.title.alternative
dc.creator.researcherBalachandra Pattanaik
dc.description.note
dc.contributor.guideRanganayakulu D
dc.publisher.placeTirunelveli
dc.publisher.universityManonmaniam Sundaranar University
dc.publisher.institutionDepartment of Mathematics
dc.date.registerednd
dc.date.completed2013
dc.date.awardednd
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Mathematics

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File43.31 kBAdobe PDFView/Open
02_certificate.pdf16.01 kBAdobe PDFView/Open
03_declaration.pdf15.69 kBAdobe PDFView/Open
04_acknowledgement.pdf14.31 kBAdobe PDFView/Open
05_contents.pdf27.74 kBAdobe PDFView/Open
06_list of figures.pdf17.57 kBAdobe PDFView/Open
07_list of tables.pdf15.38 kBAdobe PDFView/Open
08_list of symbols.pdf12.71 kBAdobe PDFView/Open
09_abstract.pdf12.58 kBAdobe PDFView/Open
10_chapter 1.pdf76.23 kBAdobe PDFView/Open
11_chapter 2.pdf152.88 kBAdobe PDFView/Open
12_chapter 3.pdf1.23 MBAdobe PDFView/Open
13_chapter 4.pdf739.54 kBAdobe PDFView/Open
14_chapter 5.pdf69.35 kBAdobe PDFView/Open
15_reference.pdf43.13 kBAdobe PDFView/Open
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