Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/181484
| Title: | Design of analog input module multiple PID controller and verilog code for ladder diagram using FPGA |
| Researcher: | G, Dhanabalan |
| Guide(s): | Selvi, S Tamil |
| Keywords: | Analog Design Diagram Module Verilog |
| University: | Anna University |
| Completed Date: | 2016 |
| Abstract: | Abstract available |
| Pagination: | xxv, 146p. |
| URI: | http://hdl.handle.net/10603/181484 |
| Appears in Departments: | Faculty of Information and Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 01_title page.pdf | Attached File | 24.46 kB | Adobe PDF | View/Open |
| 02_certificate.pdf | 633.68 kB | Adobe PDF | View/Open | |
| 03_abstract.pdf | 101.36 kB | Adobe PDF | View/Open | |
| 04_acknowledgement.pdf | 4.67 kB | Adobe PDF | View/Open | |
| 05_table of content.pdf | 192.79 kB | Adobe PDF | View/Open | |
| 06_list of symbol and abbreviations.pdf | 51.81 kB | Adobe PDF | View/Open | |
| 07_chapter 1.pdf | 317.89 kB | Adobe PDF | View/Open | |
| 08_chapter 2.pdf | 1.79 MB | Adobe PDF | View/Open | |
| 09_chapter 3.pdf | 979.89 kB | Adobe PDF | View/Open | |
| 10_chapter 4.pdf | 1.54 MB | Adobe PDF | View/Open | |
| 11_chapter 5.pdf | 1.88 MB | Adobe PDF | View/Open | |
| 12_chapter 6.pdf | 1.47 MB | Adobe PDF | View/Open | |
| 13_conclusion and future work.pdf | 31.35 kB | Adobe PDF | View/Open | |
| 14_references.pdf | 528.71 kB | Adobe PDF | View/Open | |
| 15_list of publication.pdf | 75.55 kB | Adobe PDF | View/Open |
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