Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/181239
Title: Performance analysis of two dimensional and three dimensional network on chip architectures
Researcher: N, Ashokkumar
Guide(s): Kavitha, A
Keywords: Algorithmic
Architectures
Chip
Dimensional
Network
University: Anna University
Completed Date: 2017
Abstract: Abstract available
Pagination: xiv, 125p.
URI: http://hdl.handle.net/10603/181239
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File9.73 kBAdobe PDFView/Open
02_certificate.pdf325.92 kBAdobe PDFView/Open
03_abstract.pdf5.15 kBAdobe PDFView/Open
04_acknowledgement.pdf4.69 kBAdobe PDFView/Open
05_table of content.pdf30.31 kBAdobe PDFView/Open
06_list of symbol and abbreviations.pdf5.5 kBAdobe PDFView/Open
07_chapter 1.pdf499.56 kBAdobe PDFView/Open
08_chapter 2.pdf187.44 kBAdobe PDFView/Open
09_chapter 3.pdf4.29 MBAdobe PDFView/Open
10_chapter 4.pdf1.38 MBAdobe PDFView/Open
11_chapter 5.pdf937.73 kBAdobe PDFView/Open
12_conclusion.pdf21.87 kBAdobe PDFView/Open
13_references.pdf1.34 MBAdobe PDFView/Open
14_list of publication.pdf120.67 kBAdobe PDFView/Open
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