Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/180775
| Title: | Hierarchical evolution of digital arithmetic circuits with built in self test logic for delay faults |
| Researcher: | Kolanchinathan, V. P. |
| Guide(s): | Kumar, Saravana G. ; Ramesh, G. P. and Velayudham, A. |
| Keywords: | arithmetic faults Hierarchical |
| University: | St. Peters University |
| Completed Date: | 2017 |
| Abstract: | Available Abstract |
| Pagination: | n.d. |
| URI: | http://hdl.handle.net/10603/180775 |
| Appears in Departments: | Department of Electronics and Communication |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 01_title.pdf | Attached File | 143.45 kB | Adobe PDF | View/Open |
| 02_certificate.pdf | 184.78 kB | Adobe PDF | View/Open | |
| 03_declaration.pdf | 128.83 kB | Adobe PDF | View/Open | |
| 04_acknowledgement.pdf | 141.85 kB | Adobe PDF | View/Open | |
| 05_abstract.pdf | 142.05 kB | Adobe PDF | View/Open | |
| 06_contents.pdf | 180.32 kB | Adobe PDF | View/Open | |
| 07_chapter 1.pdf | 592.89 kB | Adobe PDF | View/Open | |
| 08_chapter 2.pdf | 334.46 kB | Adobe PDF | View/Open | |
| 09_chapter 3.pdf | 1.16 MB | Adobe PDF | View/Open | |
| 10_chapter 4.pdf | 408.24 kB | Adobe PDF | View/Open | |
| 11_chapter 5.pdf | 669.16 kB | Adobe PDF | View/Open | |
| 12_chapter 6.pdf | 1.68 MB | Adobe PDF | View/Open | |
| 13_chapter 7.pdf | 240.56 kB | Adobe PDF | View/Open | |
| 14_chapter 8.pdf | 101.63 kB | Adobe PDF | View/Open | |
| 15_references.pdf | 219.27 kB | Adobe PDF | View/Open |
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