Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/175970
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DC FieldValueLanguage
dc.coverage.spatialElectronics and Communication
dc.date.accessioned2017-10-17T09:55:59Z-
dc.date.available2017-10-17T09:55:59Z-
dc.identifier.urihttp://hdl.handle.net/10603/175970-
dc.description.abstractFile attached
dc.format.extent154 p.
dc.languageEnglish
dc.relationno. of references 106
dc.rightsuniversity
dc.titleScalable architectures for VLSI implementation of DSP algorithms
dc.title.alternative-
dc.creator.researcherSinghal, Subodh Kumar
dc.subject.keywordDSP algorithms
dc.subject.keywordScalable architectures
dc.description.notebibliography p.145-154
dc.contributor.guideMohanty, Basant Kumar
dc.publisher.placeGuna
dc.publisher.universityJaypee University of Engineering and Technology, Guna
dc.publisher.institutionDepartment of Electronics and Communication
dc.date.registeredn.d.
dc.date.completed2017
dc.date.awardedn.d.
dc.format.dimensions-
dc.format.accompanyingmaterialNone
dc.type.degreePh.D.
dc.source.inflibnetINFLIBNET
Appears in Departments:Department of Electronics and Communication

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01_title.pdfAttached File26.4 kBAdobe PDFView/Open
02_certtificate.pdf11.94 kBAdobe PDFView/Open
03_abstract.pdf20.37 kBAdobe PDFView/Open
04_declaration.pdf12.56 kBAdobe PDFView/Open
05_acknowledgement.pdf12.85 kBAdobe PDFView/Open
06_contents.pdf17.38 kBAdobe PDFView/Open
07_list_of_tables.pdf18.74 kBAdobe PDFView/Open
08_list_of_figures.pdf25.18 kBAdobe PDFView/Open
09_abbreviations.pdf13.44 kBAdobe PDFView/Open
10_symbols.pdf18.21 kBAdobe PDFView/Open
11_chapter1.pdf76.73 kBAdobe PDFView/Open
12_chapter2.pdf57.1 kBAdobe PDFView/Open
13_chapter3.pdf158.42 kBAdobe PDFView/Open
14_chapter4.pdf327.65 kBAdobe PDFView/Open
15_chapter5.pdf167.08 kBAdobe PDFView/Open
16_chapter6.pdf171.53 kBAdobe PDFView/Open
17_chapter7.pdf26.9 kBAdobe PDFView/Open
18_bibliography.pdf50.81 kBAdobe PDFView/Open
19_list_of_publication.pdf16.92 kBAdobe PDFView/Open
20_summary.pdf25.19 kBAdobe PDFView/Open


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