1. Shodhganga@INFLIBNET
  2. Karunya University
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/166232
Title: Modeling and Simulation of Dual Metal Surrounding Gate Junction less Transistor for Enhanced Digital Circuit Applications
Researcher: Charles Pravin. J
Guide(s): Nirmal. D
Keywords: Modeling and Simulation of Dual Metal
University: Karunya University
Completed Date: 2017
Abstract: newline
Pagination: 127 pages
URI: http://hdl.handle.net/10603/166232
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01. first page.pdfAttached File80.81 kBAdobe PDFView/Open
02. declaration.pdf200.89 kBAdobe PDFView/Open
03. bonafide certificate.pdf144.55 kBAdobe PDFView/Open
04. abstract.pdf149.45 kBAdobe PDFView/Open
05. acknowledgement.pdf6.04 kBAdobe PDFView/Open
06. table of contents.pdf206.12 kBAdobe PDFView/Open
07. list of tables.pdf84.79 kBAdobe PDFView/Open
08. list of figures.pdf26.83 kBAdobe PDFView/Open
09. list of symbols and abbreviations.pdf38.27 kBAdobe PDFView/Open
10. chapter - i.pdf32.4 kBAdobe PDFView/Open
11. chapter - ii.pdf221.43 kBAdobe PDFView/Open
12. chapter - iii.pdf791.22 kBAdobe PDFView/Open
13. chapter - iv.pdf1.19 MBAdobe PDFView/Open
14. chapter - v.pdf1.16 MBAdobe PDFView/Open
15. chapter - vi.pdf505.11 kBAdobe PDFView/Open
16. chapter - vii.pdf76.81 kBAdobe PDFView/Open
17. references.pdf165.29 kBAdobe PDFView/Open
Show full item record


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: