Reconfigurable architecture in resistive switching crossbar

Abstract

Major reasons behind inferior performance of FPGA over ASIC in terms of delay, area and newlinepower consumption are extensive use of SRAM and programmable interconnects. In order to newlineimprove the performance gap between ASIC and FPGA so as to increase the share of FPGAs newlinein the market, new emerging devices are being investigated as a replacement for SRAM and newlineprogrammable interconnection switches. Memristor is one of the most attractive device which can act as nonvolatile memory (by storing data in the form of resistance) and as logic (switching) element. But it is passive device and CMOS circuits are required to implement functions using it. Out of the available models, VTEAM model found to be more simple, accurate and flexible, and hence used in the work carried out in this research. Stateful NOR, an universal logic newlinegate, can be implemented with memristors. Memristors are seldom used as standalone devices and are fabricated in the form of crossbar over CMOS layer using nanoimprint lithography. Implementation of stateful NOR gate on memristive crossbar requires write, evaluate (imply) and read operations, but memristors can not be isolated from crossbar for these operations. Memristive crossbar arrays are analyzed for write and evaluate (imply) operations in order to find the effect of them on contents of memristors of crossbar that are not part of logic and limitations on the size of crossbar to keep them unaltered. Sneak path problem is common in such crossbar and analysis of read operation has confirmed that the size of crossbar has to be restricted in order to newlineread the state of memristor correctly. Specialized memristive architectures which logically restricts the size of crossbar array are also investigated for use in implementation of NOR operation. Crossbar array made up of Complementary Resistive Switches (CRSs) are free from sneak path newlineproblem. Novel stateful NOR operation with CRSs using a single voltage source is proposed in this work. The analysis of write, read and evaluate (NOR) operations on CRS crossbar