Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/142230
Title: A multi processor dynamic and partial reconfigurable coarse grained system on chip architecture for real time embedded computing applications
Researcher: Janakiraman, N.
Guide(s): Nirmal Kumar, P.
Keywords: Applications
Architecture
Computing
Dynamic
Reconfigurable
University: Anna University
Completed Date: february, 2015
Abstract: Abstract available
Pagination: xxxiv, 217p.
URI: http://hdl.handle.net/10603/142230
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File57.55 kBAdobe PDFView/Open
02_certificate.pdf1.21 MBAdobe PDFView/Open
03_abstract.pdf17.08 kBAdobe PDFView/Open
04_acknowledgement.pdf7.48 kBAdobe PDFView/Open
05_table of contents.pdf27.35 kBAdobe PDFView/Open
06_list of tables.pdf19.93 kBAdobe PDFView/Open
07_list of figures.pdf18.02 kBAdobe PDFView/Open
08_list of symbols and abbreviations.pdf91.94 kBAdobe PDFView/Open
09_chapter 1.pdf87.4 kBAdobe PDFView/Open
10_chapter 2.pdf2.04 MBAdobe PDFView/Open
11_chapter 3.pdf1.83 MBAdobe PDFView/Open
12_chapter 4.pdf1.63 MBAdobe PDFView/Open
13_chapter 5.pdf1.2 MBAdobe PDFView/Open
14_conclusion and future work.pdf37.18 kBAdobe PDFView/Open
15_references.pdf111.5 kBAdobe PDFView/Open
16_list of publications.pdf20.53 kBAdobe PDFView/Open
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