Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/141693
Title: Design evaluation and performance analysis of low power LDPC decoder
Researcher: Revathy, M.
Guide(s): Saravanan, R.
Keywords: Architecture
Cyclic
Evaluation
Orthogonal
Survey
University: Anna University
Completed Date: december, 2015
Abstract: Abstract available
Pagination: xviii, 115p.
URI: http://hdl.handle.net/10603/141693
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File25.37 kBAdobe PDFView/Open
02_certificate.pdf462.99 kBAdobe PDFView/Open
03_abstract.pdf11.65 kBAdobe PDFView/Open
04_acknowledgement.pdf7.42 kBAdobe PDFView/Open
05_table of contents.pdf15.36 kBAdobe PDFView/Open
06_list of tables.pdf7.13 kBAdobe PDFView/Open
07_list of figures.pdf9.66 kBAdobe PDFView/Open
08_list of abbreviations.pdf9.1 kBAdobe PDFView/Open
09_chapter 1.pdf668.19 kBAdobe PDFView/Open
10_chapter 2.pdf1.03 MBAdobe PDFView/Open
11_chapter 3.pdf1.96 MBAdobe PDFView/Open
12_chapter 4.pdf566.24 kBAdobe PDFView/Open
13_conclusion and future works.pdf45.11 kBAdobe PDFView/Open
14_references.pdf314.88 kBAdobe PDFView/Open
15_list of publications.pdf14.31 kBAdobe PDFView/Open
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