1. Shodhganga@INFLIBNET
  2. Anna University
  3. Faculty of Information and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/141683
Title: FPGA based performance enhanced architectures for the FIR filter using distributed arithmetic
Researcher: Shanthi, K. G.
Guide(s): Nagarajan, N.
Keywords: Architecture
BinaryCoding
FIR
Novelty
SystolicArchitectures
University: Anna University
Completed Date: may, 2015
Abstract: Abstract available
Pagination: xxiv, 116p.
URI: http://hdl.handle.net/10603/141683
Appears in Departments:Faculty of Information and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title page.pdfAttached File30.49 kBAdobe PDFView/Open
02_certificate.pdf671.14 kBAdobe PDFView/Open
03_abstract.pdf24.04 kBAdobe PDFView/Open
04_acknowledgement.pdf20.4 kBAdobe PDFView/Open
05_table of contents.pdf30.6 kBAdobe PDFView/Open
06_list of tables.pdf22.72 kBAdobe PDFView/Open
07_list of figures.pdf35.87 kBAdobe PDFView/Open
08_list of symbols and abbreviations.pdf34.29 kBAdobe PDFView/Open
09_chapter 1.pdf75.48 kBAdobe PDFView/Open
10_chapter 2.pdf124.4 kBAdobe PDFView/Open
11_chapter 3.pdf202.26 kBAdobe PDFView/Open
12_chapter 4.pdf128.13 kBAdobe PDFView/Open
13_chapter 5.pdf160.03 kBAdobe PDFView/Open
14_chapter 6.pdf249.01 kBAdobe PDFView/Open
15_conclusion and scope for future work.pdf28.82 kBAdobe PDFView/Open
16_references.pdf43.51 kBAdobe PDFView/Open
17_list of publications.pdf19.97 kBAdobe PDFView/Open
Show full item record


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: