Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/141452
Title: Design and analysis of 8T 10T sram cells for power reduction using low power techniques
Researcher: Rukkumani, V.
Guide(s): Devarajan, N.
Keywords: Architecture
Circuits
Power
Reduction
Transistors
University: Anna University
Completed Date: september, 2015
Abstract: Abstract available
Pagination: xxi, 136p.
URI: http://hdl.handle.net/10603/141452
Appears in Departments:Faculty of Electrical Engineering

Files in This Item:
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01_title page.pdfAttached File23.18 kBAdobe PDFView/Open
02_certificate.pdf4.95 MBAdobe PDFView/Open
03_abstract.pdf6.62 kBAdobe PDFView/Open
04_acknowledgement.pdf5.32 kBAdobe PDFView/Open
05_table of contents.pdf10.69 kBAdobe PDFView/Open
06_list of tables.pdf4.25 kBAdobe PDFView/Open
07_list of figures.pdf6.9 kBAdobe PDFView/Open
08_list of symbols and abbreviations.pdf10.64 kBAdobe PDFView/Open
09_chapter 1.pdf115.4 kBAdobe PDFView/Open
10_chapter 2.pdf1.18 MBAdobe PDFView/Open
11_chapter 3.pdf785.36 kBAdobe PDFView/Open
12_chapter 4.pdf526.64 kBAdobe PDFView/Open
13_chapter 5.pdf120.48 kBAdobe PDFView/Open
14_chapter 6.pdf1.34 MBAdobe PDFView/Open
15_conclusion and future scope.pdf21.12 kBAdobe PDFView/Open
16_references.pdf39.47 kBAdobe PDFView/Open
17_list of publications.pdf9.72 kBAdobe PDFView/Open
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