Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/141017
Title: Investigations on power delay product of low power VLSI architectures for fir filter
Researcher: Karunakaran, S.
Guide(s): Rukmanidevi, S.
Keywords: Architectures
Filter
Investigations
Multiplier
Power
University: Anna University
Completed Date: september, 2015
Abstract: Abstract available
Pagination: xxii, 130p.
URI: http://hdl.handle.net/10603/141017
Appears in Departments:Faculty of Information and Communication Engineering

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01_title page.pdfAttached File33.64 kBAdobe PDFView/Open
02_certificate.pdf660.83 kBAdobe PDFView/Open
03_abstract.pdf22.78 kBAdobe PDFView/Open
04_acknowledgement.pdf4.44 kBAdobe PDFView/Open
05_table of contents.pdf11.9 kBAdobe PDFView/Open
06_list of tables.pdf4.14 kBAdobe PDFView/Open
07_list of figures.pdf8.55 kBAdobe PDFView/Open
08_list of symbols and abbreviations.pdf4.91 kBAdobe PDFView/Open
09_chapter 1.pdf277.28 kBAdobe PDFView/Open
10_chapter 2.pdf59.54 kBAdobe PDFView/Open
11_chapter 3.pdf440.39 kBAdobe PDFView/Open
12_chapter 4.pdf395.49 kBAdobe PDFView/Open
13_chapter 5.pdf906.18 kBAdobe PDFView/Open
14_chapter 6.pdf154.81 kBAdobe PDFView/Open
15_chapter 7.pdf148.95 kBAdobe PDFView/Open
16_chapter 8.pdf25.08 kBAdobe PDFView/Open
17_conlcusion and scope for the future work.pdf15.08 kBAdobe PDFView/Open
18_references.pdf20.05 kBAdobe PDFView/Open
19_list of publications.pdf9.42 kBAdobe PDFView/Open
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