1. Shodhganga@INFLIBNET
  2. Savitribai Phule Pune University
  3. College of Engineering Pune
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/125959
Title: FPGA based reconfigurable system to test System level design by testbench methodology
Researcher: Wani, Prakash Waman
Guide(s): Pasalkar, N B
Keywords: Digital circuits, Conventional test setup, VLSI chips, Test benches, FAB testing of ASIC
University: Savitribai Phule Pune University
Completed Date: 2007
Abstract: Abstract not available newline
Pagination: xx, 202p.
URI: http://hdl.handle.net/10603/125959
Appears in Departments:College of Engineering Pune

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/01_title.pdfAttached File23.67 kBAdobe PDFView/Open
01_title.pdf23.67 kBAdobe PDFView/Open
/02_certificate.pdf188.38 kBAdobe PDFView/Open
02_certificate.pdf188.38 kBAdobe PDFView/Open
/03_declaration.pdf179.26 kBAdobe PDFView/Open
03_declaration.pdf179.26 kBAdobe PDFView/Open
/04_acknowledgement.pdf55.5 kBAdobe PDFView/Open
04_acknowledgement.pdf55.5 kBAdobe PDFView/Open
05_contents.pdf123.96 kBAdobe PDFView/Open
06_list of figures.pdf129.21 kBAdobe PDFView/Open
07_list of tables.pdf43.29 kBAdobe PDFView/Open
08_list of acronyms.pdf84.77 kBAdobe PDFView/Open
09_list of symbols.pdf28.41 kBAdobe PDFView/Open
10_synopsis.pdf1.56 MBAdobe PDFView/Open
11_chapter 1.pdf604.93 kBAdobe PDFView/Open
12_chapter 2.pdf5.66 MBAdobe PDFView/Open
13_chapter 3.pdf1.13 MBAdobe PDFView/Open
14_chapter 4.pdf1.94 MBAdobe PDFView/Open
15_chapter 5.pdf8.77 MBAdobe PDFView/Open
16_chapter 6.pdf1.7 MBAdobe PDFView/Open
17_chapter 7.pdf364.07 kBAdobe PDFView/Open
18_references.pdf244.88 kBAdobe PDFView/Open
19_list of publications.pdf250.56 kBAdobe PDFView/Open
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