Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/122806
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dc.coverage.spatialPhysics
dc.date.accessioned2016-11-28T06:16:57Z-
dc.date.available2016-11-28T06:16:57Z-
dc.identifier.urihttp://hdl.handle.net/10603/122806-
dc.description.abstractAbstract not available newline newline
dc.format.extentvii, 222p.
dc.languageEnglish
dc.relation-
dc.rightsuniversity
dc.titleStudies on jitter response and design dependent dynamics of some pll_based clock or data recovery circuits
dc.title.alternative-
dc.creator.researcherGhosh, Madhusudan
dc.subject.keywordHogge phase detector, Analytical studies, Simulation studies, Nonlinear dynamics, ZC1-DPLL
dc.description.noteAppendix p. 206-221
dc.contributor.guideSarkar, B C
dc.publisher.placeBardhaman
dc.publisher.universityThe University of Burdwan
dc.publisher.institutionDepartment of Physics
dc.date.registeredn.d.
dc.date.completed2012
dc.date.awardedn.d.
dc.format.dimensions-
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Physics

Files in This Item:
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01_title.pdfAttached File76.74 kBAdobe PDFView/Open
02_synopsis.pdf114.18 kBAdobe PDFView/Open
03_certificate.pdf117.72 kBAdobe PDFView/Open
04_preface.pdf87.28 kBAdobe PDFView/Open
05_acknowledgement.pdf86.38 kBAdobe PDFView/Open
06_contents.pdf89.12 kBAdobe PDFView/Open
07_chapter 1.pdf466.52 kBAdobe PDFView/Open
08_chapter 2.pdf600.33 kBAdobe PDFView/Open
09_chapter 3.pdf444 kBAdobe PDFView/Open
10_chapter 4.pdf1.08 MBAdobe PDFView/Open
11_chapter 5.pdf1.09 MBAdobe PDFView/Open
12_chapter 6.pdf153.04 kBAdobe PDFView/Open
13_appendix.pdf199.38 kBAdobe PDFView/Open
14_list of publication.pdf150.41 kBAdobe PDFView/Open


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