Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/11703
Title: High performance signature detection architectures for network applications
Researcher: Arun, M.
Guide(s): Krishnan, A.
Upload Date: 3-Oct-2013
University: Anna University
Completed Date: 
Abstract: The continuous growth in the Internet s size, the amount of data traffic, and the complexity of processing the traffic give rise to new challenges in building high performance network devices. One of the most fundamental tasks performed by these devices is detecting the signature for predefined keys. Address lookup, packet classification, and deep packet inspection are some of the operations which involve Signature Detection Technique (SDT). SDT is typically a part of the packet forwarding mechanism, and may create a performance bottleneck. More than that software based SDT algorithms are normally slow which can not match with today s high speed network traffic. Therefore, fast and resource efficient hardware architectures are required. Most commonly used hardware based techniques for such signature detection are Finite Automata, Discrete Comparators, Knuth-Morris-Pratt (KMP) Algorithm, Content addressable Memory (CAM) and Bloom Filter. While CAM can offer very fast search, it is expensive and consumes a large amount of power. A Bloom filter is a randomized data structure used to represent a set of bit-strings compactly and support set membership queries. Hence, designing high performance, powerefficient and high-speed signature detection techniques has received a great deal of attention in the research and industrial community. In this research, high performance signature detection techniques based on CAM and Bloom filters are proposed. The main focus is on pre computation and look up techniques to achieve effective hardware based signature detection techniques to detect the signatures. 10 GBPS Network Traffic Generator (TNTG) is used to test the functionality and ensure the reliability of the proposed architectures. This approach involves a unique combination of algorithmic and architectural techniques that outperform some of the current techniques in terms of performance, speed and power-efficiency. newline newline newline
Pagination: xvi, 110
URI: http://hdl.handle.net/10603/11703
Appears in Departments:Faculty of Information and Communication Engineering

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01_title.pdfAttached File233.78 kBAdobe PDFView/Open
02_certificates.pdf939.85 kBAdobe PDFView/Open
03_abstract.pdf12.77 kBAdobe PDFView/Open
04_acknowledgement.pdf11.8 kBAdobe PDFView/Open
05_contents.pdf37.22 kBAdobe PDFView/Open
06_chapter 1.pdf219.21 kBAdobe PDFView/Open
07_chapter 2.pdf196.66 kBAdobe PDFView/Open
08_chapter 3.pdf234.23 kBAdobe PDFView/Open
09_chapter 4.pdf524.76 kBAdobe PDFView/Open
10_chapter 5.pdf81.82 kBAdobe PDFView/Open
11_chapter 6.pdf29.52 kBAdobe PDFView/Open
12_appendix 1.pdf196.44 kBAdobe PDFView/Open
13_references.pdf37.75 kBAdobe PDFView/Open
14_publications.pdf16.69 kBAdobe PDFView/Open
15_vitae.pdf12.47 kBAdobe PDFView/Open
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