1. Shodhganga@INFLIBNET
  2. Bharathidasan University
  3. Department of Computer Science and Applications
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/115607
Title: Configurational computatson_ design of parallel algorithms on processor arrays with dynamically reconfigurable bus systems
Researcher: Thahgavel, P
Guide(s): Muthuswamy, V P
Keywords: Configurational Computatson, Parallel Algorithms, Reconfigurable Bus Systems
University: Bharathidasan University
Completed Date: 1994
Abstract: Abstract not available newline newline
Pagination: vii, 134p.
URI: http://hdl.handle.net/10603/115607
Appears in Departments:Department of Computer Science and Applications

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01_title.pdfAttached File30.95 kBAdobe PDFView/Open
02_certificate.pdf26.76 kBAdobe PDFView/Open
03_declaration.pdf24.05 kBAdobe PDFView/Open
04_contents.pdf58.39 kBAdobe PDFView/Open
05_preface.pdf78.49 kBAdobe PDFView/Open
06_acknowledgement.pdf39.55 kBAdobe PDFView/Open
07_list of publications.pdf40.44 kBAdobe PDFView/Open
08_chapter 1.pdf399.59 kBAdobe PDFView/Open
09_chapter 2.pdf366.25 kBAdobe PDFView/Open
10_chapter 3.pdf872.72 kBAdobe PDFView/Open
11_chapter 4.pdf595.82 kBAdobe PDFView/Open
12_chapter 5.pdf630.94 kBAdobe PDFView/Open
13_chapter 6.pdf361.36 kBAdobe PDFView/Open
14_chapter 7.pdf85.05 kBAdobe PDFView/Open
15_references.pdf469.38 kBAdobe PDFView/Open
16_appendix.pdf1.21 MBAdobe PDFView/Open
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