1. Shodhganga@INFLIBNET
  2. Dr. M.G.R. Educational and Research Institute
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/114153
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2016-10-17T06:26:39Z-
dc.date.available2016-10-17T06:26:39Z-
dc.identifier.urihttp://hdl.handle.net/10603/114153-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleHIGH SPEED LOW POWER DESIGN STRATEGIES WITH ANALYSIS FOR VLSI BASED MULTIPLIERS
dc.title.alternative
dc.creator.researcherP. VENKATESWARA RAO
dc.description.note
dc.contributor.guideDr. S. RAVI
dc.publisher.placeChennai
dc.publisher.universityDr. M.G.R. Educational and Research Institute
dc.publisher.institutionDepartment of Electronics and Communication Engineering
dc.date.registered30.03.2007
dc.date.completed14.10.2010
dc.date.awarded13.07.2011
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Electronics and Communication Engineering

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