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Browsing by Researcher/Guide Raja paul perinbam J

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Showing results 1 to 6 of 6

Upload Date	Title	Researcher	Guide(s)
17-Feb-2017	A cross layer approach for energy Efficient secured data transmission In wireless sesnor network	Bennila thangammal C	Raja paul perinbam J
21-Aug-2014	Design of reconfigurable architecture for high performance turbo decoder	Mathana J M	Raja paul perinbam J
10-Nov-2014	Dynamically reconfigurable bit parallel pipelined embedded architecture for high speed signal processing	Ramadass N	Raja paul perinbam J
9-Jan-2015	Low jitter phase locked loop architectures for high speed clock generation	Moorthi S	Raja paul perinbam J
19-Aug-2019	Novel design techniques for enhancing capacity and security of reversible data hiding in digital images	Denslin brabin D R	Raja paul perinbam J
27-Nov-2014	A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits	Meganathan D	Raja paul perinbam J

Showing results 1 to 6 of 6