Browsing by Researcher/Guide Jinaga, B C
Showing results 3 to 4 of 4
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Upload Date | Title | Researcher | Guide(s) |
---|---|---|---|
27-May-2014 | P-adic Extension of Projective Geometry based Low Density Parity Check Codes | Venkatesulu, Bestha | Jinaga, B C; Adiga, B S |
25-Jun-2014 | Vtmos-a new logic family for low power digital circuits | Ragini, Kanchinireddy | Satyam, M; Jinaga, B C |