Browsing by Researcher/Guide Raja paul perinbam J
Showing results 4 to 6 of 6
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Upload Date | Title | Researcher | Guide(s) |
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9-Jan-2015 | Low jitter phase locked loop architectures for high speed clock generation | Moorthi S | Raja paul perinbam J |
19-Aug-2019 | Novel design techniques for enhancing capacity and security of reversible data hiding in digital images | Denslin brabin D R | Raja paul perinbam J |
27-Nov-2014 | A power optimized 10 bit 100ms s pipelined Analog to digital converter for high Speed interface circuits | Meganathan D | Raja paul perinbam J |