Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/9752
Title: Application specific VLSI processor design for parametric speech synthesis
Researcher: Saini, Ravi
Guide(s): Chandra Shekhar
Prasad, B
Keywords: Electronic Science
Architectures
Computer Architecture
VLSI processor
speech synthesis
Upload Date: 5-Jul-2013
University: Kurukshetra University
Completed Date: 2012
Abstract: Application Specific Instruction set Processor (ASIP) is a comparatively new approach to realize programmable processors which for the targeted application domain can deliver very significant performance and power benefits, while regaining the advantage of functional flexibility through software programmability. In a sense ASIPs bridge the design space between general purpose processor based implementation of the application and dedicated hardware implementation of the same application as an ASIC. Since there is no formal theory to guide VLSI design implementations, VLSI design approaches actually need to be applied to build VLSI system implementations and then compare them. Different VLSI architecting approaches have been tried over the years and some general comparative performance and power benefits have been catalogued. ASIPs represent a comparatively new approach for realizing applications through them. While some individual aspects of ASIP design including their instruction set design have been subjects of research and automation, not too much work has been reported in the literature where ASIPs have been built for applications and their benefits established vis-à-vis other implementation approaches such as general purpose processor based approach. This thesis selects an application, namely, parametric speech synthesis and builds an ASIP for the application by systematically going through an ASIP design approach proposed that involves the steps of application analysis, selection of application specific instructions for high speed implementation via the ASIP, selection of hardware algorithms and their efficient architectures to build high performance functional units for supporting high speed execution of application specific instructions, execution unit and control unit design for the ASIP, and ASIP testing. The emphasis of the research work is not on just exploring or automating any one aspect of ASIP design methodology, but to propose and follow the methodology, build the ASIP, run the application
Pagination: vi, 229p.
URI: http://hdl.handle.net/10603/9752
Appears in Departments:Department of Electronic Sc.

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01_title.pdfAttached File81.46 kBAdobe PDFView/Open
02_declaration.pdf23.38 kBAdobe PDFView/Open
03_certificate.pdf23.13 kBAdobe PDFView/Open
04_acknowledgements.pdf23.17 kBAdobe PDFView/Open
05_abstract.pdf28.16 kBAdobe PDFView/Open
06_contents.pdf51.98 kBAdobe PDFView/Open
07_list of figures.pdf34.44 kBAdobe PDFView/Open
08_list of tables.pdf24.61 kBAdobe PDFView/Open
09_chapter 1.pdf74.21 kBAdobe PDFView/Open
10_chapter 2.pdf221.05 kBAdobe PDFView/Open
11_chapter 3.pdf61.79 kBAdobe PDFView/Open
12_chapter 4.pdf143.88 kBAdobe PDFView/Open
13_chapter 5.pdf318.08 kBAdobe PDFView/Open
14_chapter 6.pdf329.56 kBAdobe PDFView/Open
15_chapter 7.pdf484.35 kBAdobe PDFView/Open
16_chapter 8.pdf53.68 kBAdobe PDFView/Open
17_chapter 9.pdf76.68 kBAdobe PDFView/Open
18_chapter 10.pdf89.4 kBAdobe PDFView/Open
19_chapter 11.pdf30.36 kBAdobe PDFView/Open
20_references.pdf126.16 kBAdobe PDFView/Open
21_list of publications.pdf520.21 kBAdobe PDFView/Open
22_summary.pdf75.4 kBAdobe PDFView/Open


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