Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/75096
Title: VLSI design of high speed atm switch on a chip
Researcher: Vasudevan, N
Guide(s): Renganathan, S
Keywords: Architecture
Buffering
Ethernet
Multiplex
Synchronous
University: Anna University
Completed Date: 31/07/2003
Abstract: Abstract available
Pagination: xxviii, 297p.
URI: http://hdl.handle.net/10603/75096
Appears in Departments:Faculty of Electrical and Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_title page.pdfAttached File14.11 kBAdobe PDFView/Open
02_certificate.pdf17.49 kBAdobe PDFView/Open
03_abstract.pdf103.33 kBAdobe PDFView/Open
04_acknowledgement.pdf26.08 kBAdobe PDFView/Open
05_table of contents.pdf223.41 kBAdobe PDFView/Open
06_list of tables.pdf88.92 kBAdobe PDFView/Open
07_list of figures.pdf188.72 kBAdobe PDFView/Open
08_list of abbreviation.pdf96.4 kBAdobe PDFView/Open
09_chapter 1.pdf218.78 kBAdobe PDFView/Open
10_chapter 2.pdf832.23 kBAdobe PDFView/Open
11_chapter 3.pdf1.77 MBAdobe PDFView/Open
12_chapter 4.pdf2 MBAdobe PDFView/Open
13_chapter 5.pdf8.14 MBAdobe PDFView/Open
14_chapter 6.pdf7.26 MBAdobe PDFView/Open
15_chapter 7.pdf2.54 MBAdobe PDFView/Open
16_results and conclusions.pdf7.63 MBAdobe PDFView/Open
17_appendix.pdf1.19 MBAdobe PDFView/Open
18_publications.pdf36.86 kBAdobe PDFView/Open
19_references.pdf63.9 kBAdobe PDFView/Open
20_curriculum vitae.pdf22.7 kBAdobe PDFView/Open


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