Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/64497
Title: Design of fault tolerant system using evolvable hardware VLSI with neural network estimator GA and simulation studies for non linear process control plant applications
Researcher: Subbaiah,P.
Guide(s): Murthy,B. Rama
Keywords: Tolerant
Hardware
Neural
Network
Estimator
University: Sri Krishnadevaraya University
Completed Date: 31/12/2006
Abstract: Abstract not available
Pagination: xviii, 177p.
URI: http://hdl.handle.net/10603/64497
Appears in Departments:Department of Instrumentation

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01_title page.pdfAttached File23.88 kBAdobe PDFView/Open
02_dedicated.pdf218.2 kBAdobe PDFView/Open
03_declaration.pdf19.13 kBAdobe PDFView/Open
04_certificate.pdf30.1 kBAdobe PDFView/Open
05_preface.pdf227.05 kBAdobe PDFView/Open
06_acknowledgement.pdf78.09 kBAdobe PDFView/Open
07_content.pdf114.86 kBAdobe PDFView/Open
08_chapter 1.pdf637.78 kBAdobe PDFView/Open
09_chapter 2.pdf1.03 MBAdobe PDFView/Open
10_chapter 3.pdf5.09 MBAdobe PDFView/Open
11_chapter 4.pdf982.72 kBAdobe PDFView/Open
12_chapter 5.pdf2.54 MBAdobe PDFView/Open
13_chapter 6.pdf1.61 MBAdobe PDFView/Open
14_results and conclusions.pdf4.03 MBAdobe PDFView/Open
15_references.pdf198.18 kBAdobe PDFView/Open
16_annexure i.pdf680.42 kBAdobe PDFView/Open


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