Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/50958
Title: Efficient Low Power Multiplier Architecture for Digital Fir Filters
Researcher: Selvakumar.J
Guide(s): 
Keywords: 
Upload Date: 13-Oct-2015
University: SRM University
Completed Date: 
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/50958
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
abstract.pdfAttached File30.04 kBAdobe PDFView/Open
acknowledgement.pdf36.73 kBAdobe PDFView/Open
bonafide certificate.pdf29.82 kBAdobe PDFView/Open
chapter 1.pdf196.52 kBAdobe PDFView/Open
chapter 2.pdf124.59 kBAdobe PDFView/Open
chapter 3.pdf347.31 kBAdobe PDFView/Open
chapter 5.pdf446.82 kBAdobe PDFView/Open
chapter 6.pdf534.68 kBAdobe PDFView/Open
chapter 7.pdf59.52 kBAdobe PDFView/Open
declaration.pdf26.13 kBAdobe PDFView/Open
list of publications.pdf58.59 kBAdobe PDFView/Open
references.pdf101.59 kBAdobe PDFView/Open
table of contents.pdf45.99 kBAdobe PDFView/Open
title.pdf31.92 kBAdobe PDFView/Open
vitae.pdf35.91 kBAdobe PDFView/Open


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