Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/4556
Title: Studies on the feasibility of developing electro optical hybrid logic circuits
Researcher: Rao, E Sreenivasa
Guide(s): Satyam, M
Lal Kishore, K
Keywords: Electro-Optical Hybrid Logic Circuits
light sources
Nonlinear Optical Loop Mirror (NLOM)
Ultrafast Nonlinear Interferometer (UNI)
Upload Date: 5-Sep-2012
University: Jawaharlal Nehru Technological University
Completed Date: February 2012
Abstract: The thesis entitled ?Studies on the feasibility of developing Electro-Optical Hybrid Logic Circuits?, investigates a new branch of hybrid opto-electronic logic circuits which can take either electrical or optical signals and produce both electrical and optical signals. The main objective of this thesis is to develop a new paradigm of thought in digital circuit design. It is well known that present day electronics extensively use electrical systems as well as optical systems. The gap between these systems is becoming narrower and narrower and it is quite likely that future systems have lot of common features. This thesis is one attempt in which the electrical and optical systems are integrated and the new area is named as hybrid opto-electronic circuits. If these two systems are to be fused together, one has to think of hybrid opto-electronic systems which can respond to either electrical or/and optical signals and give rise to both electrical and optical signals. This thesis is mainly devoted to develop the required concepts for realizing hybrid digital blocks namely logic gates and flipflops. The work comprises of implementing the basic hybrid building blocks namely, hybrid logic gates and hybrid sequential circuits. First, hybrid circuits to perform logic functions like NOT, NAND, NOR, AND, OR, EX-OR are realized and their functionality have been demonstrated by carrying out experimental work on bread board using discrete components. These basic hybrid logic blocks have been used in building hierarchical hybrid circuits, as the input and output logic levels are the same. Implementation of higher level cascadable combinational logic circuits such as hybrid half adder, full adder and 4 bit adder have also been discussed and demonstrated using bottom up design procedure with OrCAD Capture 10.3 simulation tool. Another important basic hybrid building block of a sequential circuit is a hybrid latch. Hence, the implementation of basic hybrid RS latch using hybrid NOR and hybrid NAND gates have been discussed.
Pagination: xxix, 223p.
URI: http://hdl.handle.net/10603/4556
Appears in Departments:Faculty of Electronics and Communication Engineering

Files in This Item:
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01_title.pdfAttached File91.29 kBAdobe PDFView/Open
02_certificate.pdf64.88 kBAdobe PDFView/Open
03_declaration.pdf67.58 kBAdobe PDFView/Open
04_dedication.pdf78.41 kBAdobe PDFView/Open
05_acknowledgements.pdf66.37 kBAdobe PDFView/Open
06_abstract.pdf67.23 kBAdobe PDFView/Open
07_table of contents.pdf77.45 kBAdobe PDFView/Open
08_list of figures.pdf109.45 kBAdobe PDFView/Open
09_list of tables.pdf66.77 kBAdobe PDFView/Open
10_list of abbreviations.pdf66.45 kBAdobe PDFView/Open
11_list of symbols.pdf91.16 kBAdobe PDFView/Open
12_chapter 1.pdf77.25 kBAdobe PDFView/Open
13_chapter 2.pdf142.45 kBAdobe PDFView/Open
14_chapter 3.pdf222.01 kBAdobe PDFView/Open
15_chapter 4.pdf1.04 MBAdobe PDFView/Open
16_chapter 5.pdf588.63 kBAdobe PDFView/Open
17_chapter 6.pdf338.65 kBAdobe PDFView/Open
18_chapter 7.pdf71.19 kBAdobe PDFView/Open
19_references.pdf85.52 kBAdobe PDFView/Open
20_appendix.pdf97.4 kBAdobe PDFView/Open


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