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Title: Design of fir filter for adaptive noise cancellation using context switching reconfigurable EHW architecture
Researcher: Uma Rajaram
Guide(s): Raja Paul Perinbam, J
Keywords: Adaptive filters
Hardware logic circuits
Upload Date: 29-Oct-2014
University: Anna University
Completed Date: 01/11/2009
Abstract: newlineConventional non adaptive filters perform well as long as the input newlinesignal is varying uniformly with noise Reconfigurable computing has been newlineproposed for signal processing applications with various objectives including newlinehigh performance flexibility specialization and most recently adaptability A newlinereconfigurable processor can be viewed as taking its inspiration from the newlinepaging mechanism in operating systems with the concept extended to newlinehardware logic circuits However there are some important distinctions when newlineextending the paging concept to hardware In the paging concept the code newlinebeing swapped between RAM and disk usually represents a single thread of newlinecontrol whereas in the hardware context the logic can be concurrent newlineReconfiguration is characterized by how fast the reconfiguration can occur newlineand how many possible reconfigurations can be used dynamic newlinereconfiguration A dynamically reconfigurable system allows the various newlinecomponents of the processor to update and even completely change the newlinefunctions implemented in the programmable device without the need for a newlinesystem reset or power down newline newline
Pagination: xvii, 116p.
Appears in Departments:Faculty of Information and Communication Engineering

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04_acknowledgement.pdf6.04 kBAdobe PDFView/Open
05_content.pdf24.2 kBAdobe PDFView/Open
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07_chapter2.pdf346 kBAdobe PDFView/Open
08_chapter3.pdf694.39 kBAdobe PDFView/Open
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12_reference.pdf66.58 kBAdobe PDFView/Open
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14_vitae.pdf6 kBAdobe PDFView/Open

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