Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/19775
Title: Power minimization in electronic circuit building blocks in deep submicron
Researcher: Mohd Yusuf Yasin
Guide(s): Syed Hasan Saeed
Keywords: Electronics and communication
Upload Date: 25-Jun-2014
University: Integral University
Completed Date: n.d.
Abstract: None
Pagination: 225p.
URI: http://hdl.handle.net/10603/19775
Appears in Departments:Department of Electronics & Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File109.83 kBAdobe PDFView/Open
02_certificate.pdf202.41 kBAdobe PDFView/Open
03_acknowledgements.pdf205.16 kBAdobe PDFView/Open
04_list of figures.pdf51.72 kBAdobe PDFView/Open
05_list of symbols.pdf172.99 kBAdobe PDFView/Open
06_list of tables.pdf23.54 kBAdobe PDFView/Open
07_contents.pdf180.24 kBAdobe PDFView/Open
08_chapter-1.pdf114.65 kBAdobe PDFView/Open
09_chapter-2.pdf135.78 kBAdobe PDFView/Open
10_chapter-3.pdf155.96 kBAdobe PDFView/Open
11-chapter-4.pdf208.36 kBAdobe PDFView/Open
12_chapter-5.pdf293.92 kBAdobe PDFView/Open
13_chapter-6.pdf499.25 kBAdobe PDFView/Open
14_chapter-7.pdf1.1 MBAdobe PDFView/Open
15_chapter-8.pdf462.22 kBAdobe PDFView/Open
16-chapter-9.pdf454.21 kBAdobe PDFView/Open
17_coclusion.pdf20.62 kBAdobe PDFView/Open
18_reference.pdf67.86 kBAdobe PDFView/Open


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