Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/135327
Title: Implementation of Efficient built in self test pattern generators using vlsi design methodologies
Researcher: C. Ravi Shakar Reddy
Guide(s): Dr. V. Sumalatha
Keywords: Built-in-self Test
Circuit under Test
Electronics and Communication Engineering
University: Jawaharlal Nehru Technological University, Anantapuram
Completed Date: 07-06-2016
Abstract: No newline
Pagination: xii, 144 P
URI: http://hdl.handle.net/10603/135327
Appears in Departments:Department of Electronics and Communication

Files in This Item:
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01_title.pdfAttached File152.84 kBAdobe PDFView/Open
02_certificate&declaration.pdf134.89 kBAdobe PDFView/Open
03_acknowledgement.pdf80.9 kBAdobe PDFView/Open
04_contents.pdf92.78 kBAdobe PDFView/Open
05_preface.pdf79.8 kBAdobe PDFView/Open
06_abstract.pdf142.43 kBAdobe PDFView/Open
07_list of tables and figures.pdf149.42 kBAdobe PDFView/Open
09_chapter 2.pdf359.16 kBAdobe PDFView/Open
10_chapter 3.pdf1.55 MBAdobe PDFView/Open
11_chapter 4.pdf1.52 MBAdobe PDFView/Open
12_chapter 5.pdf278.63 kBAdobe PDFView/Open
13_chapter 6.pdf157.43 kBAdobe PDFView/Open
14_references.pdf221.94 kBAdobe PDFView/Open


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