Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/122806
Title: Studies on jitter response and design dependent dynamics of some pll_based clock or data recovery circuits
Researcher: Ghosh, Madhusudan
Guide(s): Sarkar, B C
Keywords: Hogge phase detector, Analytical studies, Simulation studies, Nonlinear dynamics, ZC1-DPLL
University: The University of Burdwan
Completed Date: 2012
Abstract: Abstract not available newline newline
Pagination: vii, 222p.
URI: http://hdl.handle.net/10603/122806
Appears in Departments:Department of Physics

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File76.74 kBAdobe PDFView/Open
02_synopsis.pdf114.18 kBAdobe PDFView/Open
03_certificate.pdf117.72 kBAdobe PDFView/Open
04_preface.pdf87.28 kBAdobe PDFView/Open
05_acknowledgement.pdf86.38 kBAdobe PDFView/Open
06_contents.pdf89.12 kBAdobe PDFView/Open
07_chapter 1.pdf466.52 kBAdobe PDFView/Open
08_chapter 2.pdf600.33 kBAdobe PDFView/Open
09_chapter 3.pdf444 kBAdobe PDFView/Open
10_chapter 4.pdf1.08 MBAdobe PDFView/Open
11_chapter 5.pdf1.09 MBAdobe PDFView/Open
12_chapter 6.pdf153.04 kBAdobe PDFView/Open
13_appendix.pdf199.38 kBAdobe PDFView/Open
14_list of publication.pdf150.41 kBAdobe PDFView/Open


Items in Shodhganga are protected by copyright, with all rights reserved, unless otherwise indicated.

Altmetric Badge: