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Title: Design and implementation of novel methods for testing static and dynamic errors in mixed signal circuits
Researcher: Hariharan K
Guide(s): Abhaikumar, V
Keywords: Novel methods, testing static and dynamic errors, mixed signal circuits, analog to digital converters, integrated circuits, built in self test, time tick BIST
Upload Date: 3-Oct-2013
University: Anna University
Abstract: Integrated Circuits (IC) with analog and digital functions have become increasingly prevalent in the semiconductor industry. Complex digital circuits are now commonly combined with analog circuits using data converters such as Analog to Digital Converters (ADC) and Digital to Analog Converter (DAC) as part of the continuing drive toward higher levels of electronic system integration and form the so-called Mixed Signal Circuits. Data converters are to be tested for static and dynamic performance to understand their relevance in low speed and high speed applications. Built in Self Test (BIST), another test technique has the entire testing hardware integrated within the device under test as a variant of ATE. The advantage of using BIST is its low cost and the ability to check the performance of the device under test every time it is put to use as it forms a part of the IC. Achieving the accuracy of ATE using BIST is the design challenge in mixed signal circuits. In this work a Time Tick BIST (TTBIST) is proposed to optimize and simplify the design of DAC and ADC testing scheme while minimizing the computational overhead. The TTBIST eludes the usage of high precision equipment for testing of data converters and also reduces the computational complexity. Generation of a synchronized and spectrally pure signal source for determining the dynamic parameters of data converters is another major issue addressed here through the design of a Direct Digital Frequency Synthesizer (DDFS). The proposed test bench consists of a DDFS, DAC and an ADC to determine the dynamic parameters of both the data converters by extracting the spectral contribution by individual dataconverters. The proposed test strategies were simulated in MATLAB and were implemented in hardware using commercially available devices like ADC 0804, MAX162, DAC0800 and FPGA level implementations were done with Altera DE1 FPGA kit. newline newline newline
Pagination: xix, 143
Appears in Departments:Faculty of Information and Communication Engineering

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01_title.pdfAttached File52.11 kBAdobe PDFView/Open
02_certificates.pdf867.35 kBAdobe PDFView/Open
03_abstract.pdf15.92 kBAdobe PDFView/Open
04_acknowledgement.pdf13.77 kBAdobe PDFView/Open
05_contents.pdf54.59 kBAdobe PDFView/Open
06_chapter 1.pdf344.54 kBAdobe PDFView/Open
07_chapter 2.pdf388.45 kBAdobe PDFView/Open
08_chapter 3.pdf257.15 kBAdobe PDFView/Open
09_chapter 4.pdf192.34 kBAdobe PDFView/Open
10_chapter 5.pdf292.19 kBAdobe PDFView/Open
11_chapter 6.pdf17.87 kBAdobe PDFView/Open
12_references.pdf68.3 kBAdobe PDFView/Open
13_publications.pdf19.59 kBAdobe PDFView/Open
14_vitae.pdf12.09 kBAdobe PDFView/Open

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