Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/114156
Title: LOW POWER VLSI ARCHITECTURE FOR IMAGE COMPRESSION USING DISCRETE COSINE TRANSFORM
Researcher: VIJAYAPRAKASH A M
Guide(s): Dr. K. S GURUMURTHY
Keywords: 
University: Dr. M.G.R. Educational and Research Institute
Completed Date: 
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/114156
Appears in Departments:Department of Electronics and Communication Engineering

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02_thesis.pdf10.24 MBAdobe PDFView/Open


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